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ISSN Print: 0040-2508
ISSN Online: 1943-6009
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A NOVEL APPROACH FOR THE DESIGN AUTOMATION OF CMOS ANALOG CIRCUITS USING HYBRID SCAmGWO ALGORITHM
ABSTRACT
The widespread use of consumer electronics has made the automation of analog design process inevitable for integrated circuits (ICs) for reduction in the overall time-to-market. In this paper, a novel tool for automated component sizing of CMOS analog circuits is presented using a novel hybrid of sine-cosine algorithm and modified grey wolf optimization algorithm (SCAmGWO) in the optimization section of the automation process. The proposed tool uses the interface of two tools, i.e., CADENCE for accurate model simulation and MATLAB for optimization of parameters using the results from CADENCE, in a loop. The performance of the proposed algorithm is evaluated using a set of different benchmark functions along with comparison. Further, a rigorous performance evaluation is also done with over 20 independent runs and a Wilcoxon rank-sum test. The performance of the proposed algorithm is evaluated with a conventional two-stage operational amplifier as benchmark. The operational amplifier implemented in CADENCE design environment, with 180 nm as standard CMOS technology, uses the aspect ratios calculated by simulating program in MATLAB using 180 nm CMOS standard process. The exploration and exploitation ability of the hybrid algorithm is improved by tailoring the advantages of two algorithms, i.e., sine-cosine algorithm and modified grey wolf optimization algorithm. To prove its acute existence, a statistical study over 20 independent runs is also performed. An overall comparison of the solution with other competing sizing tools proves its efficiency. The immutability of the design obtained using SCAmGWO algorithm is also validated using Monte Carlo simulation and corner analysis.
-
Bansal, J.C. and Singh, S., A Better Exploration Strategy in Grey Wolf Optimizer, J. Ambient Intell. Hum. Comput., vol. 1, pp. 1-20, 2020.
-
Ceperic, V., Butkovic, Z., and Baric, A., Design and Optimization of Self-Biased Complementary Folded Cascode, MELECON Conf., IEEE Mediterranean Electrotechnical, Malaga, Spain, 2006.
-
Dehbashian, M. and Nejad, M., An Enhanced Optimization Kernel for Analog IC Design Automation Using the Shrinking Circles Technique, Eng. Appl. Artif. Intell., vol. 58, pp. 62-78, 2017.
-
Dehbashian, M. and Nejad, M., A New Hybrid Algorithm for Analog ICs Optimization Based on the Shrinking Circles Technique, Integration, VLSI J., vol. 56, pp. 148-166, 2016.
-
Eberhart, R.C. and Shi, Y., Comparison between Genetic Algorithms and Particle Swarm Optimization, Evolutionary Programming, Berlin: Springer, 1998.
-
Ghosh, S., Symbiotic Organisms Search Algorithm for Optimal Design of CMOS Two-Stage Opamp with Nulling Resistor and Robust Bias Circuit, IET Circuits Devices Syst., vol. 13, no. 9, pp. 679-688, 2019.
-
Kennedy, J. and Eberhart, R., Particle Swarm Optimization, in Proc. of ICNN'95 - Intl. Conf. on Neural Networks, Perth, WA, Australia, 1995.
-
Kumar, P. and Duraiswamy, K., An Optimized Device Sizing of Analog Circuits Using Particle Swarm Optimization, J. Comput. Sci., vol. 8, pp. 930-935, 2012.
-
Majeed, M.A.M. and Rao, P.S., Optimization of CMOS Analog Circuits Using Grey Wolf Optimization Algorithm, 14th IEEE India Council Intl. Conf. (INDICON), Roorkee, India, 2017.
-
Majeed, M.A.M. and Sreehari, P., An Enhanced Grey Wolf Optimization Algorithm with Improved Exploration Ability for Analog Circuit Design Automation, Turk. J. Elect. Eng. Comput. Sci., vol. 26, pp. 2605-2617, 2018a.
-
Majeed, M.A.M. and Sreehari, P., Optimal Design of CMOS Amplifier Circuits Using Whale Optimization Algorithm, First Intl. Conf. on Communication, Networks and Computing (CNC 2018), Gwalior, India, 2018b.
-
Majeed, M.A.M. and Sreehari Rao, P., A Hybrid of WOA and mGWO Algorithms for Global Optimization and Analog Circuit Design Automation, COMPEL - Int. J. Comput. Math. Elect. Electron. Eng., vol. 38, pp. 452-472, 2018c.
-
Makhadmeh, S.N., Khader, A.T., Al-Betar, M.A., Naim, S., Abasi, A.K., and Alyasseri, Z.A.A., A Novel Hybrid Grey Wolf Optimizer with Min-Conflict Algorithm for Power Scheduling Problem in a Smart Home, Swarm Evol. Comput., vol. 60, p. 100793, 2021.
-
Mirjalili, S., Seyed Mohammad, M., and Andrew, L., Grey Wolf Optimizer, Adv. Eng. Software, vol. 69, pp. 46-61, 2014.
-
Mirjalili, S., SCA: A Sine Cosine Algorithm for Solving Optimization Problems, Knowledge-Based Syst., vol. 96, pp. 120-133, 2016.
-
Mittal, N., Urvinder, S., and Balwinder, S., Modified Grey Wolf Optimizer for Global Engineering Optimization, Appl. Comput. Intell. Soft Comput. vol. 2, pp. 1-16, 2016.
-
Sarkar, P., Naushad Manzoor, L., Sourav, N., Baishnab, K.L., and Saurav, C., Offset Voltage Minimization Based Circuit Sizing of CMOS Operational Amplifier Using Whale Optimization Algorithm, J. Inform. Optim. Sci., vol. 39, no. 1, pp. 83-98, 2018.
-
Shams, M., Esmat, R., and Ahmad, H., Clustered Gravitational Search Algorithm and Its Application in Parameter Optimization of a Low Noise Amplifier, Appl. Math. Comput., vol. 258, pp. 436-453, 2015.
-
Thakker, R., Maryam Shojaei B., and Mahesh, B., Low Power Low-Voltage Analog Circuit Design Using Hierarchical Particle Swarm Optimization, in 22nd Intl. Conf. on VLSI Design, New Delhi, India, 2009.
-
Talbi, E., A Taxonomy of Hybrid Metaheuristics, J. Heuristics, vol. 8, pp. 541-564, 2002.
-
Varul, R.A. and Yildirim, T., Swarm Intelligence Based Sizing Methodology for CMOS Operational Amplifier, in IEEE 12th Intl. Symp. on Computational Intelligence and Informatics (CINTI), Budapest, Hungary, 2011.
-
Varul, R.A. and Yildirim, T., Analog Circuit Sizing via Swarm Intelligence, AEU-Int. J. Electron. Commun, vol. 66, no. 9, pp. 732-740, 2012.